The present invention relates generally to a semiconductor device and method of forming the same and, more specifically, to metal gate and high dielectric constant (high-k) devices.
In devices with poly-Si gates, achieving a desired work function of a gate material for n-FET and p-FET CMOS devices to meet an operating voltage requirement is achieved by heavy doping of poly-Si, an acceptor dopant for p-FET and a donor for n-FET. In a high-k dielectric/metal gate stack, different metal gate materials which possess the desired work function are used for n-FET and p-FET devices. Since the work function of the metal gate material depends on the high-k gate dielectric and processing conditions, selection of suitable gate materials presents a challenge for process integration. Metal gate work function may also be adjusted by placing cap layers between the metal gate and the high-k gate dielectric. The position of the cap layers after thermal processing determines the work function and threshold voltage (Vt) of the device. Diffusion of the cap layer through the thin high-k gate dielectric into an interfacial layer during anneals causes degradation of carrier mobility. Attempts to limit diffusion by nitridation of the high-k gate dielectric had limited success.